注意事项:请携带简历,并且自备笔2015校园招聘技术类岗位主要面向计算机、软件、信息技术和通信电子等相关专业的毕业生。
届时,来自技术部门及HR部门的负责人将会从不同角度向大家详细介绍公司相关信息并会对招聘职位及随后进行的笔试注意事项做详细介绍,欢迎同学们前来交流。
【招聘职位】
ASIC Front-End Engineer
Location: Beijing, China
Number: 8
Responsibility:
1. Design blocks for highly complex digital communication and multimedia SoCs
2. Block/System level verification
3. FPGA prototyping
Qualification:
1. Master Degree in CS or EE or equivalent.
2. Proficient in Digital IC design FE flow is a must (e.g. RTL coding, verification, synthesis, DFT insertion
and timing analysis)
3. Skill with simulator is a must ( e.g. ncsim and vcs)
4. Ability of programming shell/perl/tcl scripts under linux OS.
5. Knowledge of Video Image Coding/Decoding/Processing/algorithm is a big plus.
6. C/C++ experience is a plus.
7. Good understanding of advanced verification methodologies, UVM/VMM is a strong plus
8. Good understanding of complex high-speed peripheral interface is a strong plus, such as
USB/Ethernet
9. English level: CET-6
10. A good team-player with open-minded and proactive working style
Physical Design Engineer
Location: BeiJing, China
Number: 8
Responsibility:
1.RTL synthesis.
2.Large scale Integrated Circuit Place & Route with advance technology nodes (like 40nm).
3.Timing analysis and fixing, timing signoff.
4.Design for Test.
5.Physical Signoff (DRC & LVS).
6.Deliver SOC chips within schedule.
Qualification:
MUST HAVE
1.Have clear and good concept for digital IC design, including timing and semiconductor knowledge.
2.Good team-player with open-minded and proactive working style
3.Good communication skills in English both writing and verbal
4.BSEE or above in related field.
NICE TO HAVE
1.Experiences in EDA tools, specially Place and Route tools is a strong plus.
2.Experiences in IC design is a strong plus.
3.Experience in Unix/Linux working environment is a plus.
4. Experience in TCL, Perl language is a plus.
Analog Design Engineer
Location: BeiJing, China
Number: 8
Responsibility:
1.Design analog or RF building blocks (such as ADC/DAC/PLL/analog filter/LNA/PA/Mixer etc) in
deep-submicro process.
2.Supervise layout and do post-layout simulations;
3.Characterization and debugging for the analog/RF blocks;
Qualification:
1.PhD EE or MSEE with Outstanding work in RF/analog design required
2.A solid track record in deep sub-micro CMOS RFIC design with experience to involve in the analog/RF
3.IC circuit from design to mass production (at least 2 production in last 5 years)
4.3 to 8 years of direct work experience with CMOS analog with 3+ year experience in < 65nm
(graduate research work in university can be counted).
5.Familiar with Cadence Virtuoso, Spectre RF, and similar tools.
6.In depth knowledge of one of the following area:
1) High performance CMOS analog design experience for communications
2) Design experience in analog-to-digital converter (ADC), mainly high speed/high resolution
SAR and sigma delta.
3) Design experience in digital-to-analog converter (DAC) for driving high precision output,
such a 50ohm line driver.
4) Design experience in high performance analog filter etc.
5) Design experience for high performance low jitter PLL (analog or all-digital);
6) Design experience in Serdes and timing circuits such as PLL, CDR, TX and RX functions.
7) Design experience in other analog functions is a plus, such as bandgap, regulator, crystal
oscillator, etc.
Software Engineer
Location: Beijing and TianJin, China
Number: 8
Responsibility:
1.Provide differentiating software solutions based on Availink IC products.
2.Customize software solutions that best address customers’ needs.
3.Test and analysis software offerings with well defined methodologies.
4.Develop manuals and tools for software customization
Qualification:
1.Solid understanding in computer technologies including operating system, system architecture, data
Structure, etc.
2.Passion for programming, good C language programming skill is a must; C++/Java is a plus.
3.Strong background in communication or electronic system, especially in modulation and
demodulation
4.Experience with participation in real software projects
5.Experience with embedded software is a plus.
6.Knowledge of software engineering is a plus
7.Knowledge of embedded hardware is a plus
8.Able to read and write documents in English.
9.A good team-player with open-minded and proactive working style
10.BS or above.
Hardware Engineer
Location: Beijing, China
Number: 9
Responsibility:
1.Identify the customers’ requirements. Deliver and improve system hardware reference designs,
related documents and application notes for customers’ evaluation, design-in, and migration to mass production.
2.Assist on validation and test of Availink’s SoC products.
3.Analyzing and resolving technical issues.
Qualification:
1.BSEE or above in related fields.
2.Solid knowledge and good understanding on both analog & digital circuit or communication
3.Basic communication knowledge.
4.Able to analyze and resolve technical issue independently.
5.Good communication skills in English both writing and verbal.
6.Good embedded circuits design capability. Experience in this field is a plus.
7.Familiar with PADs or Protel or Candence EDA Tools is a plus.
QA Engineer
Location: Beijing, China
Number: 9
Responsibilities:
1.Analyze requirements specifications to create optimal test plans and strategies.
2.Develop, execute, and validate test cases and scripts to support the test automation strategy
3.Produce defect descriptions to quantify problems to a high degree and work with Development team
on the resolution.
4.Familiar with software agile methodology; QA process and practise
Qualifications
1.Some experience in software development
2.Experience developing test automation
3.Experience with C/C++, MySQL, and basic scripting languages, e.g. php, python
4.Strong communication (written and verbal), interpersonal, and teamwork skills
5.Strong analytical, problem solving and organizational skills
6.BS or above; BSEE/BSCS is prefer